PAÜ .:. Eğitim Öğretim Bilgi Sistemi

COURSE INFORMATION

Course Code	Course Title	L+P Hour	Semester	ECTS
ELK 511	VHDL PROGRAMMING OF HIGH DENSITY INTEGRATED CIRCUITS	3 + 0	2nd Semester	7,5

COURSE DESCRIPTION

Course Level	Master's Degree
Course Type	Elective
Course Objective	Design of High-density digital circuits, and their theoretical infrastructure needed to be taken to ensure the production stage. Graduate students will be a good way to keep up with basic information. High digital technology to create an infrastructure to be able to follow more closely.
Course Content	Introduction to fundamentals of digital design / SPLD, PAL, GAL, PLA / CPLD structures / Symbolic hardware description language: Abel and VHDL / Circuit programming applications using XILINX simulation package programs.
Prerequisites	No the prerequisite of lesson.
Corequisite	No the corequisite of lesson.
Mode of Delivery	Face to Face

COURSE LEARNING OUTCOMES

1	Knows the fundamental concepts of Digital Systems.
2	Knows symbolic hardware description languages.
3	Can design digital circuits using FPGA.
4	Knows making modular design.

COURSE'S CONTRIBUTION TO PROGRAM

	PO 01	PO 02	PO 03	PO 04	PO 05	PO 06	PO 07	PO 08	PO 09	PO 10	PO 11
LO 001	4	3	4	2	2	2	1	1	1	1	1
LO 002	5	4	4	3	4	2	1	1	1	1	1
LO 003	4	4	4	3	4	2	1	1	1	1	1
LO 004	5	4	4	5	5	2	1	1	1	1	1
Sub Total	18	15	16	13	15	8	4	4	4	4	4
Contribution	5	4	4	3	4	2	1	1	1	1	1

ECTS ALLOCATED BASED ON STUDENT WORKLOAD BY THE COURSE DESCRIPTION

Activities	Quantity	Duration (Hour)	Total Work Load (Hour)
Course Duration (14 weeks/theoric+practical)	14	3	42
Hours for off-the-classroom study (Pre-study, practice)	14	3	42
Assignments	1	20	20
Mid-terms	1	30	30
Final examination	1	41	41
Presentation / Seminar Preparation	1	20	20
Total Work Load ECTS Credit of the Course			195 7,5

COURSE DETAILS

Select Year

Course Details

Course Code	Course Title	L+P Hour	Course Code	Language Of Instruction	Course Semester
ELK 511	VHDL PROGRAMMING OF HIGH DENSITY INTEGRATED CIRCUITS	3 + 0	1	Turkish	2022-2023 Fall

Course Coordinator	E-Mail	Phone Number	Course Location	Attendance
Asts. Prof. Dr. BEDRİ BAHTİYAR	bedribahtiyar@pau.edu.tr		MUH A0475	%70

Goals		Design of High-density digital circuits, and their theoretical infrastructure needed to be taken to ensure the production stage. Graduate students will be a good way to keep up with basic information. High digital technology to create an infrastructure to be able to follow more closely.
Content		Introduction to fundamentals of digital design / SPLD, PAL, GAL, PLA / CPLD structures / Symbolic hardware description language: Abel and VHDL / Circuit programming applications using XILINX simulation package programs.

Topics

Weeks	Topics
1	Introduction to FPGA
2	Structures of ROM,PROM,EEPROM, SPLD,CPLD, PAL, GAL
3	Structures ASIC ve GATE ARRAY yapıları
4	Introduction to VHDL (Entity, Architecture, Data types, Operators)
5	Introduction to VHDL (Entity, Architecture, Data types, Operators)
6	Combinational Code (when, with-select)
7	Combinational Code (For-Generate)
8	Sequential Code(process, if, case)
9	Sequential Code(For-Loop)
10	Components
11	ALU with using Component
12	IP Cores
13	Arithmetic IP Cores
14	Calculating Function value with IP Cores

Materials

Materials are not specified.

Resources

Course Assessment

Assesment Methods	Percentage (%)	Assesment Methods Title
Final Exam	50	Final Exam
Midterm Exam	50	Midterm Exam

L+P: Lecture and Practice
PQ: Program Learning Outcomes
LO: Course Learning Outcomes

Prospective Student