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FIRST CYCLE - BACHELOR'S DEGREE
.
FACULTY OF ENGINEERING
.
COMPUTER ENGINEERING DEPARTMENT
.
253 Computer Engineering (2014)
Course Information
|
Course Learning Outcomes
|
Course's Contribution To Program
|
ECTS Workload
|
Course Details
COURSE INFORMATION
Course Code
Course Title
L+P Hour
Semester
ECTS
CENG 205
DIGITAL SYSTEMS
2 + 2
3rd Semester
5
COURSE DESCRIPTION
Course Level
Bachelor's Degree
Course Type
Compulsory
Course Objective
The aim of this course is to introduce digital systems and their design. At the end of this course the student will be able to design and realize combinational logics according to the system needs described in a problem.
Course Content
Number Systems: Binary numbers, conversion between two different number systems. Arithmetic calculations of different number systems, BCD addition. Introduction to logic Circuits. Introduction to Combinational logic design: Binary logic, logic gates, Boolean algebra, min- terms and max-terms and their conversions, SOP and POS functions. System design optimization in two levels. Introduction to Karnough- Maps, system design samples solved using Karnough- Maps. Multilevel system design optimization. Decoder, encoder and multiplexer design samples. PLA design samples. Half –adder and full adder design samples. Subtraction samples using 2’s complement. Subtractor design. Introduction to 1-bit registers, introduction to different type of Flip-flops, SR-RS flip-flop, D flip-flop and JK flip- flop. Introduction to Shift Registers. Introduction to UP/DOWN Counter design using flip-flops, Ring and Johnson Counters.
Prerequisites
No the prerequisite of lesson.
Corequisite
No the corequisite of lesson.
Mode of Delivery
Face to face
COURSE LEARNING OUTCOMES
1
Introduction to number systems
2
Introduction to logic circuits
3
Introduction to logic circuit design
4
Combinational logic circuit design
5
Flip-flops and 1-bit registers
6
Designing shift registers and UP/DOWN Counters
COURSE'S CONTRIBUTION TO PROGRAM
PO 01
PO 02
PO 03
PO 04
PO 05
PO 06
PO 07
PO 08
PO 09
PO 10
PO 11
PO 12
LO 01
3
3
2
2
2
3
2
2
2
2
2
2
LO 02
3
5
3
3
2
3
2
2
2
2
2
2
LO 03
3
5
5
5
2
3
2
3
2
2
2
2
LO 04
2
5
5
5
5
2
3
2
2
2
2
2
LO 05
2
5
5
5
5
2
3
2
2
2
2
2
LO 06
2
5
5
3
3
3
2
2
2
2
2
2
Sub Total
15
28
25
23
19
16
14
13
12
12
12
12
Contribution
3
5
4
4
3
3
2
2
2
2
2
2
ECTS ALLOCATED BASED ON STUDENT WORKLOAD BY THE COURSE DESCRIPTION
Activities
Quantity
Duration (Hour)
Total Work Load (Hour)
Course Duration (14 weeks/theoric+practical)
14
4
56
Hours for off-the-classroom study (Pre-study, practice)
14
3
42
Assignments
3
4
12
Mid-terms
1
10
10
Final examination
1
10
10
Total Work Load
ECTS Credit of the Course
130
5
COURSE DETAILS
Select Year
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2018-2019 Fall
2017-2018 Fall
2016-2017 Fall
2015-2016 Fall
2014-2015 Fall
2013-2014 Fall
2012-2013 Fall
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Course Term
No
Instructors
Details
2018-2019 Fall
1
MERİÇ ÇETİN
Details
2018-2019 Fall
2
MERİÇ ÇETİN
Course Details
Course Code:
CENG 205
Course Title:
DIGITAL SYSTEMS
L+P Hour :
2 + 2
Course Code :
1
Language Of Instruction:
Turkish
Course Semester :
2018-2019 Fall
Course Coordinator :
ASSOCIATE PROFESSOR MERİÇ ÇETİN
E-Mail:
mcetin@pau.edu.tr
Phone Number :
Course Location
MUH A0327, MUH A0402,
Goals :
The aim of this course is to introduce digital systems and their design. At the end of this course the student will be able to design and realize combinational logics according to the system needs described in a problem.
Content :
Number Systems: Binary numbers, conversion between two different number systems. Arithmetic calculations of different number systems, BCD addition. Introduction to logic Circuits. Introduction to Combinational logic design: Binary logic, logic gates, Boolean algebra, min- terms and max-terms and their conversions, SOP and POS functions. System design optimization in two levels. Introduction to Karnough- Maps, system design samples solved using Karnough- Maps. Multilevel system design optimization. Decoder, encoder and multiplexer design samples. PLA design samples. Half –adder and full adder design samples. Subtraction samples using 2’s complement. Subtractor design. Introduction to 1-bit registers, introduction to different type of Flip-flops, SR-RS flip-flop, D flip-flop and JK flip- flop. Introduction to Shift Registers. Introduction to UP/DOWN Counter design using flip-flops, Ring and Johnson Counters.
Attendance :
%
Topics
Weeks
Topics
1
Introduction to Number Systems
2
Introduction to Boolean Logic
3
Solving Different Problems using Boolean Logic
4
Introduction to Combinational Logic Circuit Design and Karnaugh Diagrams
5
Problem Solving Different Combinational Logic Problems ve Desgining Different Combinational Logic Circuits
6
Introduction to Combinational MSI and LSI Equipments and Design
7
Introduction to Combinational MSI and LSI Equipments and Design
8
Introduction to Sequential Circuit Analyses and Modelling
9
Analyses of Moore Machine,State Table, State Diagram,Mathematical Model and Timing Diagram
10
Introduction to Register, Counters and Memory Desing, Design of Up and Down Counters
11
Realizing Different Type of Registers, Ring and Johnson Counters and different type of Memories.
12
Realizing Different Type of Registers, Ring and Johnson Counters and different type of Memories.
13
Realizing Different Type of Arithmetic Logic Units, Solving of Different Projects.
14
Solving and Designing Different Type of Combinational Large Size Logic Circuits.
Materials
Materials are not specified.
Resources
Course Assessment
Assesment Methods
Percentage (%)
Assesment Methods Title
Final Exam
40
Final Exam
Midterm Exam
35
Midterm Exam
Field/Clinic/Laboratory Practices
15
Field/Clinic/Laboratory Practices
Attendance to Lesson
10
Attendance to Lesson
L+P:
Lecture and Practice
PQ:
Program Learning Outcomes
LO:
Course Learning Outcomes
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